发信人: rickysinger (ricky), 信区: EE
标 题: 南加州半导体公司Marvell Jr./Sr. Analog Design Engineer职位招人(多个名额)
发信站: BBS 未名空间站 (Thu Sep 6 20:15:23 2018, 美东)
公司地点在Aliso Viejo/Irvine, CA. 提供H1B和Greencard支持。所以有工作经验和即
如有兴趣请发简历到[email protected] 提供内推给hiring manager.
Become a member of a world-class analog design team in providing high
performance analog and mixed mode circuits for leading data communications
and networking products. Designers have opportunities to design high
performance transceivers and other critical analog functions, including
• analog-to-digital converters (ADC),
• digital-to-analog converters (DAC),
• phase-Locked Loop (PLL),
• filter, adaptive equalizers, finite-impulse response (FIR) filter,
and decision-feedback equalizer (DFE).
• serializer-deserializer (Serdes), clock and data recovery (CDR)
circuits, and phase-locked loop (PLL) or other timing circuits.
Team members participate in circuit architecture, circuit implementation,
design review, layout, and silicon validation.
Qualified candidates have design experience in one or more area of high
performance CMOS circuits in the following:
• ADC, including but not limited to flash, SAR, pipeline, cyclic,
sigma delta, and other techniques.
• DAC for driving high precision output, such a 50ohm line driver.
• Filters and/or equalization, including but not limited to continuous
time filter, discrete-time filters, FIR filter, and DFE.
• Serdes and timing circuits such as PLL, CDR, TX and RX functions.
• Other analog functions is a plus, such as bandgap, regulator,
crystal oscillator, etc.
• Knowledge in signal processing and communication theories is a plus
• MSEE with emphasis in CMOS analog/mixed-signal integrated circuit
• Ph.D. with research emphasis in CMOS analog/mixed-signal integrated
circuit design and implementation.
• Familiar with the use of various CAD tools for design, physical
layout, and verification
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